## A quick update

So for the past few weeks I’ve been building 1 bit registers. And I mean a whole bunch; 32 to be precise. For registers B through E of our 8-bit digital computer.

And now I’m starting to wire them together.

This is a circuit which implements the entire circuit we described in Introduction to Digital Computers, Part 4.

It’s not quite working yet; I need to finish wire wrapping the back pane, and building a test circuit to put it through its paces.

But the number of transistors we need to make this have grown, and I’ve filled the original panel almost entirely full. And once it’s done, we can walk through a demo of the circuits actually in action.

Then onto Introduction to Digital Computers Part 5, where we control the circuits with another circuit, building a functional computer, followed by Part 6 where we talk about instruction decoding and decoding strategies.

## Quick Video: The Accumulator

A new quick video with a bit of a status update: I now have a working accumulator register tied to my ALU. (I’m also working on the flags register as well as the 4 8-bit registers B through E introduced in the “Introduction to Digital Computers Part 4” video.

This includes video of the ALU in action.

As a quick aside, each board of my ALU contains 66 transistors each, handling addition, subtraction, and, or, xor, not, left-shift, right-shift and passing the bus through to the output, as well as driving the status LEDs.

Each accumulator board contains 37 transistors: 1 to drive the LED, 8 to provide a tri-state gate for writing the accumulator to the bus, and 28 transistors to provide the three S/R flip flips and associated latching logic so we load on the rising edge of the clock line, and present the results to the output on the falling edge. And we need 11 boards total: 8 for the accumulator and 3 for the flags. There is an additional flags logic board which contains 43 transistors providing glue logic to make the flags work with the ALU.

And each register board contains 36 transistors: 1 to drive the LED, 19 for the 2 S/R flip flips making the D-latch, and two tri-stage gates using 8 transistors each; one to output the register to the data bus, and another to the address bus. (This is so we can combine two registers, such as B and C, into a single 16-bit address value.)

Each board now takes me about an hour to assemble–and I’ve got 20 register boards to build, as well as the flags logic board (which should be delivered from Seeed Studio in a couple of weeks, along with a board that contains 8 LEDs which will display the contents of the bus line (so we can see better what’s going on with our circuits than me waving vaguely towards a bunch of toggle switches).

So that’s our update.

I do have the next video outlined; basically I intend to roughly follow the evolution of the control circuits from older computers, starting with the ENIAC–which used a bank of mechanical toggle switches and a mechanical counter to control the circuits that made up the ENIAC’s math circuits and registers. That will progress to using a transistor-based counter circuit and decoder circuits to get instructions, and show how a modified transistor-based counter with data latching abilities can be used for jumps and conditional jumps as we send signal pulses to our registers, accumulator and ALU.

Thanks for watching.

## It was bound to happen.

One of the boards I designed simply does not work. Worse, it’s not a simple error: I can’t simply cut one or two lines on the board and run jumpers. Turns out a bunch of resistors were incorrectly wired to power–and cutting them would require so much work it’s easier to basically start over again.

And it was such a rookie mistake, too.

That means my hope for having the accumulator and flags registers connected to the ALU will have to wait a few weeks. Meanwhile I suppose I can start building the B through E registers…

## A quick status update to a computer made of transistors…

Why build one when you can build 8, string them together in a primitive card cage and wire wrap the pieces together?

This is the accumulator and the ALU together for the first time. I need to build a test circuit and verify the connections before I video tape this part of the work. And notice I have space for a flags register as well as the B through E registers.

Because I can, and loose transistors aren’t all that expensive…

## It’s alive!

So it turns out my 1 bit ALU–which has both circuitry for our accumulator and a tristate circuit to write to our bus, works correctly! Over the next week my plan is to assemble 8 of them and hook them up to my ALU.

## My accumulator boards just showed up!

They’re nowhere near as complicated as the 1 bit ALU boards, but they do contain the accumulator circuit as discussed in our “Introduction to Digital Computers Part 4 video, along with a single tristate circuit for allowing the contents to be written to our bus, as discussed elsewhere in the same video.

These accumulator circuits are used as-is with the accumulator of our transistor-based circuit, and with additional circuitry for our flags register.

Of course this will take a while to build–and I have another 1,000 transistors and resistors on order (because ordering in bulk is cheap)–so hopefully I will be able to demonstrate a working accumulator with the ALU circuit built earlier.

Fortunately the boards (which implement the logic for a 1 bit accumulator) are not quite as complicated.

This is starting to get exciting, because instead of just showing addition we can show state, that is, we can show intermediate results being stored away and used for subsequent operations.

## I am unreasonably happy that my 1 bit ALU board works.

One thing about my “Introduction to Digital Computers” series I wanted to verify was that all the circuits designed in the series in fact works correctly.

And one aspect of that–which we introduced in the first part of the fourth video–was the complete ALU.

While I’ve taken the liberty to do some minor redesigns (so as to reduce the number of transistors–things like realizing we don’t need a separate XOR circuit if we already have A XOR B embedded in the adder circuit)–I’ve built a circuit that is entirely made of transistors and resistors (with a couple of status LEDs to show the outputs visually on the board) that actually is a full 1 bit slice of my 8-bit ALU.

And I’m unreasonably happy that it (the second iteration of the circuit board design) works flawlessly.

Of course I have 7 more blank boards and a whole bunch of resistors and transistors on order.

And when they arrive I plan to wire it all up to demonstrate that the principles introduced here in fact work as advertised.

## Introduction to Digital Computers 4: Computer Architecture

Okay, this took much longer than I wanted it to.

But finally the fourth video for our Introduction to Digital Computer series!

In this fourth video I start to tie the pieces together. We first finish the Arithmetic Logic Unit, then we tie it in with six registers: an accumulator, flag register, and four general purpose registers. Along the way we solve three problems: how do we create a three-state gate to drive our bus, how we handle the timing of read and write operations, and how we can build an accumulator that can read and write at the same time. We then show these circuits in action, using the control lines to sequence through a very simple operation.

Sign up for an account and let me know what you think!

## Introduction to Digital Computers: an Update.

So here’s where the next video stands.

First, as I noted in a previous blog post, I’ve settled on an 8080-like MPU with 6 8-bit registers and an internal 8-bit bus.

Now to make an internal 8-bit bus work, you nee a tri-state gate, a logic circuit which can be used to disconnect our logic gate from a common bus. The idea here is that you may have six things that can write their output to a single set of lines (the bus), but only one thing actually writes out to the bus at the same time.

Which I now have a successful design for.

I’ve also figured out the timing issues for the accumulator. Basically the accumulator register is always tied to the output of our ALU–but because you’re reading the results into the accumulator at the same time you’re writing the previous value as the output. So ideally we want an accumulator which can latch the results internally when a clock signal changes state–but doesn’t actually output the results until the clock state changes back.

An interesting side effect is that if you want to copy a value into the accumulator, it is easier to simply write the results through the ALU. Meaning we need a control state on the ALU that simply copies the input across. (On the other hand, it means instructions like the 8080 instruction `SUB (IX+index)` relatively easy, since once the address is loaded, the memory value at address IX+index passes through the ALU on its way to the accumulator.)

And that means the test ALU board I just sent off for fabrication (and which will probably have a one-month turnaround, because you can have it fast or have it cheap–but you can’t have both fast and cheap) is now out of date.

Don’t worry, I’ll explain all of this in an upcoming video.

I do plan to build separate boards for the regular registers (the B/C/D/E and F registers), and for the A register (which does not have a write-enable line, but does contain multiple latches to shift values on both the clock signal going high and going low).

The only other circuit I need is to develop 90 degree out of phase signal to properly time the loading of all of the registers and the ALU.

Once I have that tested, I can start putting together the next video.

## Making Circuit Boards.

So one of my goals of my series “Introduction To Digital Computers” is to show the design of a computer that can be built entirely out of NPN transistors. The idea is that by showing the design of a digital computer from the absolute ground up–from something you can hold in your hands rather than from some theoretical abstraction–it makes the design of a digital computer a concrete thing. And hopefully that makes the entire process of designing a digital computer more “real” rather than some abstraction in some textbook somewhere.

But I’m beginning to realize that if I’m going to design something from NPN transistors, I need to build the circuits to make sure they work. After all, there are a lot of designs purportedly showing designing gates using NPN transistors that simply will not work.

So I’ve started relying more on MacSpice and iCircuit to verify my designs.

That doesn’t go far enough.

So the other day I’ve spent some time building the final ALU.

The circuit diagrams (from Eagle) were translated into two 100mm by 100mm boards (since the 61 transistors and countless resistors don’t fit on one board), one board which contains the logic for the ‘S’ output line (the sum/difference, and AND/OR/XOR/NOT logic) and one board which contains the logic for the ‘C’ output line (the carry/borrow/shift logic). Both schematics as PDF files can be downloaded here: BitALU.zip

And the reason for the 100mm by 100mm boards is that Seeed Studio has an amazingly cheap deal on 100mm by 100mm boards. (But make the board a millimeter above the given size, the price jumps from \$5/board to \$50/board.) I think the way they can offer this deal is that they’re manufacturing their own boards for their own products–and they are selling leftover space on those sheets.

Hopefully the design is correct; after assembling one board and verifying it works correctly I plan to run off a set of 10, populate 8 of them, and assemble a fully working 8-bit ALU in order to verify the design.

I also plan to verify the design of the register circuits from the prior video, and actually assemble them.

The target, in the end, is a computer which has 6 8-bit registers: an accumulator, a flags register, and four additional intermediate 8-bit registers B, C, D and E. This is similar to the 8080 MPU, though instead of an H/L register, the ultimate design will use a 16-bit IX register, a 16-bit PC register, a 16-bit stack pointer, and internal registers for processing microcode and latching intermediate results to and from main memory. (The design of the IX register will be limited only to those instructions necessary to maintain a call stack for C–which means we only really need instructions to push and pop IX from the stack, to copy SP to IX and back, and to access memory at a fixed 8-bit and 16-bit offset from IX. Of course this also implies that the B and C registers as well as the D and E registers can be combined to form a 16-bit address.)

But baby steps, baby steps.

So this means the next video may be delayed another few weeks so I can verify my designs.