SR Latch

In the discussion of a bistable circuit, we showed how a bistable circuit–that is, a circuit that is stable in one of two states–can be made with just two NPN transistors.

The problem with that circuit, however, is to set the state of that circuit you have to pull one of the inputs of one of the transistors to the voltage line to change the state of the circut.

For a digital circuit, we want to also drive the input from the output of another digital circuit, and that requires a slightly different approach.

One way to do this is with NOR gates.

Screenshot 2023 01 08 at 4 43 51 PM

Recall with a NOR gate, the output is 1 if both inputs are 0. In the image above, as both inputs to the bottom NOR gate is 0, the output is 1–and that output keeps the top NOR gate’s output off.

If we were to press the bottom button, on the other hand, causing the bottom NOR gate to set its output to 0:

Screenshot 2023 01 08 at 4 46 00 PM

Pressing the button causes the bottom gate to turn off. This then causes the top gate to turn on (as both its inputs are off), which means both inputs of the bottom gate are now on.

Since they’re both on, the bottom gate remains off (and the top gate on) if we release the bottom button:

Screenshot 2023 01 08 at 4 47 50 PM

We can construct each of these NOR gates using individual transistors, as we saw in the previous section. This gives us the following circuit diagram:

Screenshot 2023 01 08 at 4 52 56 PM

The four transistors in the center represent our bistable circuit. If we wire these transistors up, we get the following circuit. (Note, for clarity, the LED that gets turned on was placed on the same side as the switch that turns that LED on.)

This gate is called the “Set-Reset Latch”, or “SR Latch” for short. (It may also be called an “SR gate” or an “SR flip-flop”.)

The idea is that one input “sets” the latch on, the other “resets” the latch off, and customarily it’s represented as a box with two inputs: “S” and “R”, and two outputs, “Q” and “~Q” (or “not Q”):


The logic table for our SR gate is a little different than for our basic logic gates:

S R Q ~Q
0 0 unchanged unchanged
1 0 1 0
0 1 0 1
1 1 undefined undefined

Now “undefined” in the table above doesn’t mean that the behavior is unknowable, but that it’s not really an “allowed” state if we want predictable behavior. To see what I mean by this, consider if we close both switches in our SR gate (based on NOR gates) above. Both NOR gates have at least one input set to 1, which means both outputs will be set to zero. This turns off both the outputs Q and ~Q:

Screenshot 2023 01 08 at 5 17 00 PM

The problem comes when you turn off both switches. Because you can never turn them off at the exact same time, and even if you could, the transistors, resistors and capacitances of the circuits are not exactly identical on both of the NOR gates, inevitably the SR gate will fall into one of two possible states.

But which state cannot be defined.

So we call this state ‘undefined’ because the behavior after we release the two input switches at the same time is unknowable.

SR Latch with NAND gates.

You can also build an SR latch using NAND gates. We wire up the switch as we did with the NOR gate:

Screenshot 2023 01 08 at 8 01 26 PM

Notice it works more or less the same way as the NAND gate, except that to turn on one side or another, you must turn off the input:

Screenshot 2023 01 08 at 8 02 33 PM

By opening the bottom switch, the NAND gate on the bottom turns on. Recall that a NAND gate is only off if both inputs are on.

By turning the bottom NAND gate on, it turns off the top NAND gate, which guarantees the bottom NAND gate remains off even as the second button is turned on again.

In order to reverse the inputs–to make the SR gate switch when the inputs are off rather than on, we can include a NOT gate at the start:

Screenshot 2023 01 08 at 8 13 39 PM

This gives us the following circuit (when constructed using transistors):

Screenshot 2023 01 08 at 8 18 46 PM

And when you wire all this up, you get the following:

Now you may ask yourself why would we want to use NAND gates instead of NOR gates to make our SR latch work?

Consider that for most of our circuits, we require an extra NOT inverter gate to swap the logic: we need an extra transistor to turn an NAND gate into an AND gate, or a NOR gate into an OR gate.

So when we design more complicated circuits using these basic building blocks, sometimes it’s more efficient to assume the inputs will be inverted, as we’ll see with the D latch on the next page.